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Computer architecture diagrams

Hi there how would I notice where the control bus, data bus and address bus would be in an exam? We went through some exam questions today and I knew where everything else was (like the Vdu controller etc) but I had to guess where the control bus, data bus and address bus went.

Please help :biggrin:

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Original post by marek35

Hi there how would I notice where the control bus, data bus and address bus would be in an exam?

If the size/width of buses is shown, the address bus will match up with the number of memory locations (TIP: it's usually the widest... but don't assume). The data bus will match the word size -- normally 8-64 bits. Control buses vary a lot, but if anything different is labelled, like interrupts or resets, then it's probably part of the control bus.

Buses are often labelled with directions. The address bus will be one-way to memory/devices. The data bus to the VDU may not have a connection back to the CPU. Control buses are usually bidirectional.

If your diagram goes into more detail, control bus originates from the control unit, address bus from the MAR and data from the MBR. (If you haven't covered this, don't worry!)

Hope that helps! If you can upload/link to any examples (freeexampapers), it'll be easier to point out any clues on specific papers and explain better if you're still having trouble.