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# OCR Gateway Physics B - P4 P5 P6 - Unofficial Mark Scheme

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1. (Original post by leopard923)
The addition if the little circle makes it a NOT and an OR together so it is NOR

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Oh...
2. (Original post by Wolfram Alpha)
I got something different. I used the formula Np/Ns * Vs to get Vp and I compared it to the primary voltages listed in the table. Thus I got the voltage was 20,000 for the primary and for D 50 for the primary. I am not sure this is correct though.
For D everything was correct expect the output voltage shouldn't have been 1000 but 200 instead. As if you checked with the others ratio between the two matched the output expect for D.
3. (Original post by Gamer_44)
For D everything was correct expect the output voltage shouldn't have been 1000 but 200 instead. As if you checked with the others ratio between the two matched the output expect for D.
I don't know anymore. It seems I was terrible at this exam which does not reflect any of my mock results .
4. (Original post by Wolfram Alpha)
I don't know anymore. It seems I was terrible at this exam which does not reflect any of my mock results .
5. (Original post by Gamer_44)
2...
6. (Original post by Wolfram Alpha)
Yes because 0.447... to 1.d.p is 0.4m/s.
Did it ask for 1 d.p. In that case im screwed
7. (Original post by l.iqteder)
Did it ask for 1 d.p. In that case im screwed
Not at all. As you long as you rounded it correctly you will get the marks.
8. (Original post by some-student)
Well it's an OR gate (curved bit) with the dot at the end which means add a NOT to it afterwards, hence making a NOR.

A NAND would look like this but the curved bit would be flat.
Was the end bit curved for the last logic gate flat? In that case i got it wrong, shouldve realised the detail . I felt like all i had to rush all the exams for the 4,5,6 modules, so i didnt have any time to check over
9. (Original post by Wolfram Alpha)
Not at all. As you long as you rounded it correctly you will get the marks.
Ah ok, thats a bit of a relief atleast, especially because i messed up the first and last 6 markers
10. (Original post by l.iqteder)
Was the end bit curved for the last logic gate flat? In that case i got it wrong, shouldve realised the detail . I felt like all i had to rush all the exams for the 4,5,6 modules, so i didnt have any time to check over
I think it was curved

I agree - I rushed the paper too
11. 8) b) Is a coherent wave source. (This includes a constant phase difference and wavelength.)
12. How much ums do u need in total for an A and how much for an A*???
13. How do you get all these questions and the marks they are worth? Do you know someone who has the paper?
14. (Original post by Swagswag1963)
How much ums do u need in total for an A and how much for an A*???
320 and 360
15. For the logic gate outputs I think I got...
0
0
0
0
1
1
1
0
16. (Original post by esmithxx)
For the logic gate outputs I think I got...
0
0
0
0
1
1
1
0
I'm pretty sure I got this as well...

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17. (Original post by Chittesh14)
How do you get all these questions and the marks they are worth? Do you know someone who has the paper?
I just can remember all the questions and marks
18. (Original post by esmithxx)
For the logic gate outputs I think I got...
0
0
0
0
1
1
1
0
got this too!
19. (Original post by some-student)
I just can remember all the questions and marks
Dam, that's good .
At least in that way, I can predict my mark accurately - so no complaints haha!
20. Hi. For the 6 mark question with uvast I did it above the question because I thought I did it wrong but it was right I got 0.45 do you think they would give me at least a mark or not

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