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Electricity capacitor help please

http://core.physicsinfo.co.uk/download.php?file=1520
http://core.physicsinfo.co.uk/download.php?file=1524

For q16bi I can't see how the MS answer causes a constant p.d. across the electronic device at all:confused::frown:.


For q 16ci what is that p.d. graph for? Like is it referring to the p.d. across the electronic circuit or capacitor? It seems ambiguous for me.

For q16cii how did they use that p.d. graph? They didn't mention that the graph was for the capacitor or is it?

Sorry if I asked silly questions, but electricity isn't my favourite chapter.:frown:

Thanks a lot:biggrin:
Reply 1
Bump
Reply 2
Original post by krisshP
http://core.physicsinfo.co.uk/download.php?file=1520
http://core.physicsinfo.co.uk/download.php?file=1524

For q16bi I can't see how the MS answer causes a constant p.d. across the electronic device at all:confused::frown:.


For q 16ci what is that p.d. graph for? Like is it referring to the p.d. across the electronic circuit or capacitor? It seems ambiguous for me.

For q16cii how did they use that p.d. graph? They didn't mention that the graph was for the capacitor or is it?

Sorry if I asked silly questions, but electricity isn't my favourite chapter.:frown:

Thanks a lot:biggrin:


Electricity isn't my best but I'll give it a go.

16bi) The mark scheme is trying to say that by using a capacitor it reduces the variations in the pd, so allowing the capacitor to charge and discharge the pd becomes more constant by reducing it's fluctuations.

16ci) The graph shows how the capacitor makes the variations smaller. capacitor charges and then discharges, causing variation in the pd. But the capacitor's presence makes these variations smaller as I said before (sorry i can't really explain it very well).

16cii) I have absolutely no idea how they got this from the graph - it's very confusing.

I've done this question before and I really struggled. Sorry I hope my explanations make sense - I'm better at particle physics :wink:
Original post by krisshP
http://core.physicsinfo.co.uk/download.php?file=1520
http://core.physicsinfo.co.uk/download.php?file=1524

For q16bi I can't see how the MS answer causes a constant p.d. across the electronic device at all:confused::frown:.


This is also for 16ci).

In the strictest sense, it will not ever be a constant voltage only an approximation to a constant voltage output.

Consider what happens during the charge/discharge cycles of the capacitor now in parallel with the output:

On the rising edge of the input waveform, the charge on the capacitor is given by Q=CV. i.e. the charge increases in direct proportion to the rising voltage.


But as soon as the input voltage peaks and reverses direction (i.e. falling half cycle), the charge on the capacitor will follow the discharge equation:

V(t) = Vpk(e-t/CR), where Vpk = maximum value of the input voltage and R is equivalent resistance of the electronic circuit the capacitor is now discharging into.

If (f) is the supply voltage frequency, then as long as the chosen value of the parallel capacitor is large such that:

CR >> 1/f,

the capacitor will retain most of its' charge and the voltage across the capacitor will remain close to Vpk.

i.e. the voltage across the capacitor will reach a peak value on the first half cycle and then look like a nearly constant dc voltage with a ripple voltage equivalent to the supply frequency superimposed on it.

diode23.gif

EDIT: to see clear larger diagram, you may need to click on the inverted image again.
(edited 10 years ago)
Original post by krisshP
For q16cii how did they use that p.d. graph? They didn't mention that the graph was for the capacitor or is it?


Agreed, it's not too clear.

The graph is supposed to represent the voltage developed across the capacitor which is the same as that presented to the load since they are in parallel.

So use the capacitor discharge formula:

Vpkmin = Vpkmax(e-t/CR) where

pkmin = lowest discharge (ripple) voltage,
pkmax = max charge (input)voltage

and rearrange to make R the subject. (hint: you will need to use natural logs).

Spoiler



Alternately:

Spoiler

(edited 10 years ago)
Reply 5
Original post by BailaS
Electricity isn't my best but I'll give it a go.

16bi) The mark scheme is trying to say that by using a capacitor it reduces the variations in the pd, so allowing the capacitor to charge and discharge the pd becomes more constant by reducing it's fluctuations.


Original post by BailaS
The MS says however that the capacitor doesn't discharge :confused: if there's constant voltage

16ci) The graph shows how the capacitor makes the variations smaller. capacitor charges and then discharges, causing variation in the pd. But the capacitor's presence makes these variations smaller as I said before (sorry i can't really explain it very well).

16cii) I have absolutely no idea how they got this from the graph - it's very confusing.

I've done this question before and I really struggled. Sorry I hope my explanations make sense - I'm better at particle physics :wink:


..
(edited 10 years ago)
Reply 6
Original post by uberteknik
But as soon as the input voltage peaks and reverses direction (i.e. falling half cycle), the charge on the capacitor will follow the discharge equation:


So then why is that in the question the graph (figure 3) when there's a negative gradient of the trace graph, when capacitor discharges, there's a straight line? Shouldn't it be exponential decay? I thought that always when a capacitor discharges, the graphs of I, V and Q are exponential decay graphs.

Original post by uberteknik
If (f) is the supply voltage frequency, then as long as the chosen value of the parallel capacitor is large such that:

CR >> 1/f,

the capacitor will retain most of its' charge and the voltage across the capacitor will remain close to Vpk.

i.e. the voltage across the capacitor will reach a peak value on the first half cycle and then look like a nearly constant dc voltage with a ripple voltage equivalent to the supply frequency superimposed on it.


:confused:
(edited 10 years ago)
Original post by krisshP
So then why is that in the question the graph (figure 3) when there's a negative gradient of the trace graph, when capacitor discharges, there's a straight line? Shouldn't it be exponential decay? I thought that always when a capacitor discharges, the graphs of I, V and Q are exponential decay graphs.:confused:


Come on Krish, we've been through this before. (Remember the case I posted a while back for the different charge/discharge rates of the relay switched capacitor? Same thing in reverse.)

The discharge cycle is an exponential decay, but on the time scale of the fig.3 graph, you don't notice that curvature easily.

Plug in some values: C = 10uF, as stated in the question, discharges through the equivalent circuit resistance of R=1700 ohms approx.

Then CR = 10x10-6 x 1700 = 17ms

5 x CR = 85ms

So at the calculated exponential decay rate, each decay would need 85ms before it got to <1% of the initial peak fully charged voltage.

The bigger the capacitor, the longer the time constant and the smaller the pk-pk ripple voltage becomes. (e.g. a 10,000uF capacitor with the same load would result in a 20 second time constant.)

That is why power supplies use large smoothing (reservoir) capacitors in order to minimise the ripple voltage and ever better approximate a steady dc voltage as presented to the load.
(edited 10 years ago)
Reply 8
Original post by uberteknik
.


Oh yeah, it's like zooming in a lot into a part of the exponential decay which means that it appears to be a straight line but isn't. Now the question parts don't seem that bad at all:biggrin:.

THANKS SO MUCH for helping, I really appreciate the effort!:smile:

PRSOM

A little bit off the question, but is there any difference between the current-time graphs for a charging capacitor and a discharging capacitor? They seem to look like the same. For a charging capacitor would it holds true that RC is the time taken for current to decrease by 1/e (about 37%) of its initial value?
(edited 10 years ago)
Original post by krisshP
Oh yeah, it's like zooming in a lot into a part of the exponential decay which means that it appears to be a straight line but isn't. Now the question parts don't seem that bad at all:biggrin:.

THANKS SO MUCH for helping, I really appreciate the effort!:smile:

PRSOM

A little bit off the question, but is there any difference between the current-time graphs for a charging capacitor and a discharging capacitor? They seem to look like the same. For a charging capacitor would it holds true that RC is the time taken for current to decrease by 1/e (about 37%) of its initial value?


None.

In the discharge case, don't forget the voltage is the pressure pushing current through the load which is simpy the e-field repulsion between electrons on opposite plates. So as the charge decays, the voltage across the capacitor also falls (V=Q/C), thus the pressure eases and hence the current flow through the load will also ease since I = V/R.

In the charging case, as the voltage builds on the capacitor, the e-field between the plates builds (energy storage) and this makes it harder for the supply voltage pressure to push more electrons onto the plate because the building e-field repels new electrons. Hence the current must reduce as the charge on the capacitor builds.

If you thnk about it logically, conservation of energy laws means that the energy required to build the charge must exactly hold true in reverse. i.e. the energy required to push an extra electron onto the plates, must be exactly the same as the energy lost if the same electron is removed.

Both therefore follow the same exponential law.

NB. This only holds true for a purely resistive load. If the load is reactive (capacitance and/or inductance) you cannot use the same equations. But once again this is beyond the A-level syllabus so no need to worry at this stage. (worry will come when you start your physics or electrical/electronics degree!)

PS. The best appreciation you can give any teacher is to ace your exam. :smile:
(edited 10 years ago)
Reply 10
Original post by uberteknik
.


Ah okay. Thanks for helping once again:biggrin:
Original post by uberteknik
Agreed, it's not too clear.

The graph is supposed to represent the voltage developed across the capacitor which is the same as that presented to the load since they are in parallel.

So use the capacitor discharge formula:

Vpkmin = Vpkmax(e-t/CR) where

pkmin = lowest discharge (ripple) voltage,
pkmax = max charge (input)voltage

and rearrange to make R the subject. (hint: you will need to use natural logs).

Spoiler


Alternately:

Spoiler



How about the second method of the mark scheme? How can we find the time constant from the graph directly?
Original post by mystreet091234
How about the second method of the mark scheme? How can we find the time constant from the graph directly?

From t = RC

R = t/C

Select a convenient peak voltage (crest) and the time at which it occurs.

Then use (0.63*peak) and read across that new voltage to find where it crosses the curve immediately after the chosen peak. You may need to extrapolate the falling part of the curve somewhat to do this.

Measure the time interval between the two events. It should be around 16mS + or -. This is the time constant of the circuit.

The question tells us the capacitance is 10uF and you now have enough information to estimate R.
(edited 8 years ago)
Original post by uberteknik
From t = RC

R = t/C

Select a convenient peak voltage (crest) and the time at which it occurs.

Then use (0.63*peak) and read across that new voltage to find where it crosses the curve immediately after the chosen peak. You may need to extrapolate the falling part of the curve somewhat to do this.

Measure the time interval between the two events. It should be around 16mS + or -. This is the time constant of the circuit.

The question tells us the capacitance is 10uF and you now have enough information to estimate R.


Thanks!
But I measured 11ms WHY:s-smilie:
This question is driving me crazy
Original post by mystreet091234
Thanks!
But I measured 11ms WHY:s-smilie:
This question is driving me crazy


Ahhh. My bad, it should be 37% of v peak not 63%, which makes extrapolating the falling curve difficult.

A better way is to do this:

Note the peak time as before. Now place a ruler on the falling curve at a tangent to the curve near the peak where it follows the curve over a useful length. Note where the ruler crosses the time base axis. Measure the time between the peak and crossing the time axis and use that as t.

(it should cross around the 18mS mark.)
Original post by uberteknik
Ahhh. My bad, it should be 37% of v peak not 63%, which makes extrapolating the falling curve difficult.

A better way is to do this:

Note the peak time as before. Now place a ruler on the falling curve at a tangent to the curve near the peak where it follows the curve over a useful length. Note where the ruler crosses the time base axis. Measure the time between the peak and crossing the time axis and use that as t.

(it should cross around the 18mS mark.)


YES IT WORKS!!
Thank you SO MUCH

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