Capacitor mantains constant voltage ?!

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Lamalam
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I am actually confused how a capacitor can actually smooth the voltage , in q part b(1)

And for part c why the shape of graph is still fluctuating even if the capacitor is present in the circuit?

can how to calculate the part c1?

Lastly for part c2
, dont know why the answer is to get a larget capacitor ?!!

Any help would be much appreciated!!

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Lamalam
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Anyone. Can help?

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Joinedup
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(Original post by Lamalam)
Anyone. Can help?

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TSR fault means attached pictures don't work... well I can't see them anyway.
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Lamalam
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(Original post by Joinedup)
TSR fault means attached pictures don't work... well I can't see them anyway.
ok now?
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Joinedup
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There is something confusing about that question - normally the power supply would be coming from a diode (or bridge rectifier) meaning there is a very high impedance to current going back into the power supply from the capacitor.

in the normal situation with a diode you've got a RC with a low time constant charging the capacitor - so the capacitor voltage follows the supply voltage closely when charging... and a RC with a higher time constant discharging the capacitor - so the capacitor voltage decays by a small proportion of the peak voltage before being charged again.

for a given load you can adjust the time constant by changing the value of C - higher C means the 'ripple' on the output voltage is lower.

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see also http://www.radio-electronics.com/inf...r-circuits.php
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Lamalam
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(Original post by Joinedup)
There is something confusing about that question - normally the power supply would be coming from a diode (or bridge rectifier) meaning there is a very high impedance to current going back into the power supply from the capacitor.

in the normal situation with a diode you've got a RC with a low time constant charging the capacitor - so the capacitor voltage follows the supply voltage closely when charging... and a RC with a higher time constant discharging the capacitor - so the capacitor voltage decays by a small proportion of the peak voltage before being charged again.

for a given load you can adjust the time constant by changing the value of C - higher C means the 'ripple' on the output voltage is lower.



---
see also http://www.radio-electronics.com/inf...r-circuits.php

so confused @@ can you explain further?
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uberteknik
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(Original post by Lamalam)
so confused @@ can you explain further?
Have a look at this thread. I answered the same question for someone else a while back.

The answer requires you to think about both charging via the rising edge of the input voltage and then discharging of the capacitor through the load because of the time constant created with the load resistance after the input voltage has peaked and begins to fall. This happens on every new cycle of the input voltage.

http://www.thestudentroom.co.uk/show...838&highlight=

If you get stuck, post here.
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Lamalam
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(Original post by uberteknik)
Have a look at this thread. I answered the same question for someone else a while back.

The answer requires you to think about both charging via the rising edge of the input voltage and then discharging of the capacitor through the load because of the time constant created with the load resistance after the input voltage has peaked and begins to fall. This happens on every new cycle of the input voltage.

http://www.thestudentroom.co.uk/show...838&highlight=

If you get stick, post here.
what is actually the circuit diagram of this problem?? the Resistor is parallel and series with cap?
Is that when the supplying voltage drops, the capacitor will discharge to "fill up " the fallinging pd to the resistor or sulpplying voltage?

Is it correct to say that the supplying voltage will charge the capacitor first because the capacitor has very low resistance compared to the resistor? Of so how the voltage is applied to the resistor?
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uberteknik
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(Original post by Lamalam)
what is actually the circuit diagram of this problem?? the Resistor is parallel and series with cap? .......

..........Is it correct to say that the supplying voltage will charge the capacitor first because the capacitor has very low resistance compared to the resistor? Of so how the voltage is applied to the resistor?
CHARGING CYCLE:

Immediately at switch on, during the +ve part of the supply waveform gradient, the total current provided by the power supply is the sum of the capacitor charging current and the circuit load current.

i.e. the power supply must provide both of these currents simultaneously, since the capacitor and electronic circuit load are in parallel with respect to the power supply.

The power supply will have a small internal resistance and so the CRsupply charging time constant will be very small. Thus Vc will follow the supply voltage on the +ve half cycle.

As the supply voltage reaches the waveform peak, the capacitor will stop charging because the charging voltage is no longer increasing. Current is no longer needed to charge the capacitor. However the load circuit will still draw current.

(Original post by Lamalam)
Is that when the supplying voltage drops, the capacitor will discharge to "fill up " the fallinging pd to the resistor or sulpplying voltage?
DISCHARGE CYCLE

As the supply voltage starts to fall (-ve gradient), both the charge now stored in the capacitor and the current available from the power supply will provide the load current for the circuit.

i.e. the power supply and the capacitor present a parallel source (two sources) of current for the load. The load circuit is now in series with both of these.

However, the power supply voltage starts to fall rapidly and as soon as the supply voltage falls below the potential Vc across the capacitor, the load current is taken exclusively from the capacitor.

Thus at this point, the capacitor alone is in series with the load.

Because the load has a finite resistance, the capacitor will begin to discharge through the load with a new time constant CRload and the voltage across the capacitor will start to fall.

i.e. the capacitor alone provides the current to the load during the falling part of the supply waveform.

Thus the capacitor is chosen to be large enough so that the CRload time constant allows the voltage across the capacitor to fall slowly enough for the power supply voltage to start rising again.

And when the power supply voltage once again rises above the remaining Vc, the capacitor will start charging again at that point.

The whole charge/discharge cycle thus repeats.

The resulting waveform across the capacitor is dc with a superimposed 'ripple' caused by the charging and limited discharge of the capacitor.
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Lamalam
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(Original post by uberteknik)
CHARGING CYCLE:

Immediately at switch on, during the +ve part of the supply waveform gradient, the total current provided by the power supply is the sum of the capacitor charging current and the circuit load current.

i.e. the power supply must provide both of these currents simultaneously, since the capacitor and electronic circuit load are in parallel with respect to the power supply.

The power supply will have a small internal resistance and so the CRsupply charging time constant will be very small. Thus Vc will follow the supply voltage on the +ve half cycle.

As the supply voltage reaches the waveform peak, the capacitor will stop charging because the charging voltage is no longer increasing. Current is no longer needed to charge the capacitor. However the load circuit will still draw current.



DISCHARGE CYCLE

As the supply voltage starts to fall (-ve gradient), both the charge now stored in the capacitor and the current available from the power supply will provide the load current for the circuit.

i.e. the power supply and the capacitor present a parallel source (two sources) of current for the load. The load circuit is now in series with both of these.

However, the power supply voltage starts to fall rapidly and as soon as the supply voltage falls below the potential Vc across the capacitor, the load current is taken exclusively from the capacitor.

Thus at this point, the capacitor alone is in series with the load.

Because the load has a finite resistance, the capacitor will begin to discharge through the load with a new time constant CRload and the voltage across the capacitor will start to fall.

i.e. the capacitor alone provides the current to the load during the falling part of the supply waveform.

Thus the capacitor is chosen to be large enough so that the CRload time constant allows the voltage across the capacitor to fall slowly enough for the power supply voltage to start rising again.

And when the power supply voltage once again rises above the remaining Vc, the capacitor will start charging again at that point.

The whole charge/discharge cycle thus repeats.

The resulting waveform across the capacitor is dc with a superimposed 'ripple' caused by the charging and limited discharge of the capacitor.

og so the electronic circuit is placed parallel to the capacitor and the voltage supply. I always think that since the capacitor acts as "bare wire" as it has no resistance (much smaller resistance than the electronic circuit), so it will first charge up, and there is no voltage going to the circuit . am I wrong, did i mix sth up??

and when the supplying voltage falls, the capacitor will discharge and give its charge tothe load, will the capacitor also give some charge to the supply voltage (like sharing its charge to both the load and the supplying voltage)?
thank you.
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uberteknik
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(Original post by Lamalam)
og so the electronic circuit is placed parallel to the capacitor and the voltage supply.
Yes. Think about the voltage potentials where the electronic circuit and the capacitor meet. These share the same point and so the potential difference measured across the capacitor AND the circuit load MUST be identical.

(Original post by Lamalam)
I always think that since the capacitor acts as "bare wire" as it has no resistance (much smaller resistance than the electronic circuit)
This is ONLY true at the instant power is supplied to the capacitor. It is NOT true for a partially or fully charged capacitor.

At switch on, current rushes in to begin charging the plates. But as the charge increases and the electric field starts to develop between the plates, the flow of more electrons (current) onto the plates starts to be impeded. The charging current follows an exponential decay function.

At the same time, the electric field between the plates is building at an inverted exponential rate. When the capacitor is fully charged, the voltage across the capacitor will equal the steady state supply voltage and the charging current will now be zero.

(Original post by Lamalam)
........, so it will first charge up, and there is no voltage going to the circuit. am I wrong, did i mix sth up??
In analysing how a capacitor works, it is often useful to consider the initial charge period as one part and the steady state conditions (equilibrium reached) as the second part.

INITIALLY:

Think about what I said in the first paragraph above for voltage potentials. It is right to say that both the capacitor and the circuit load will have exactly the same potential across them because they share common points in the circuit.

It is right to say that initially the capacitor will draw more current than the circuit because at switch on, the capacitor briefly presents a short circuit path of lower resistance than the circuit.

But also think about Kirchoff's current law for branch currents in the circuit. Because the capacitor and circuit load are in parallel, the power supply current must branch at the junction. Most of the initial current surge is because the capacitor initially has a lower resistance than the load at that time. But some of the power supply current must still be drawn by the load.

The pd developed across the parallel combination of capacitor and load is therefore controlled by

a)the charging current for the capacitor (which is an exponential function)
b)the circuit load current.

As the capacitor charge current falls and the pd across the capacitor rises accordingly, the circuit load current increases until in both cases a stead state is achieved.

STEADY STATE:

The electronic circuit and the capacitor are connected to exactly the same points in the circuit. i.e. They are in parallel and both of these points are at the same potential.

It follows from R=V/I that when the capacitor is fully charged, then there is no charging current. i.e. when I = 0 then R = infinity.

The effective resistance across the capacitor has risen from zero to infinity as an exponential increase.

At the same time, the circuit load resistance has remained constant throughout.

(Original post by Lamalam)
........and when the supplying voltage falls, the capacitor will discharge and give its charge to the load, will the capacitor also give some charge to the supply voltage (like sharing its charge to both the load and the supplying voltage)?
thank you.
The capacitor cannot give current back to the supply. Current only flows out of the capacitor into the load because the supply in essence, presents an infinite resistance by comparison to the load circuit.

To explain this is way more than you need to understand for A-level physics so do not worry yourself at this stage.
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