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MEI D2 Wednesday 3rd of June

Simplex method

I got make 36 wardrobes, make now drawer units and make 10 desks resulting in a profit of 3380?

Explanation for making 44 wardrobes with some wastage: 25 new area of wood so 5 more wardrobes can be made because wardrobes use 5 area of wood
so 36+5=41 wardrobes can be made

No desks are made so 5 area of wood free, 1 wardrobe more can be made

41+1=42

Some wood wasa wasted in the first part so 2 more wardrobes can be made

44 wardrobes.

Boolean Algebra:
Is A implies B the same as NOT (a AND NOT b) therefore the circuit uses a NOT gate and a NAND gate?

EMV: I put drive to W, take train to V, taketube to KC.
The shortest time (no delays) was about 99.4 and the average time was 114.4?
Original post by Primus2x
Simplex method

I got make 36 wardrobes, make now drawer units and make 10 desks resulting in a profit of 3380?

Explanation for making 44 wardrobes with some wastage: 25 new area of wood so 5 more wardrobes can be made because wardrobes use 5 area of wood
so 36+5=41 wardrobes can be made

No desks are made so 5 area of wood free, 1 wardrobe more can be made

41+1=42

Some wood wasa wasted in the first part so 2 more wardrobes can be made

44 wardrobes.

Boolean Algebra:
Is A implies B the same as NOT (a AND NOT b) therefore the circuit uses a NOT gate and a NAND gate?

EMV: I put drive to W, take train to V, taketube to KC.
The shortest time (no delays) was about 99.4 and the average time was 114.4?


Woops, I started a new thread for MEI D2 before seeing your one. Oh well.

I got the same answer as you for the simplex question yeah, though I didn't give an answer for the later parts of the question where you had to talk about waste.
A implies B = (NOT A) OR B, so I don't think you got that right.
If I can remember rightly the expression for the circuit was:
(A AND (A Implies B) AND C) Implies D
= NOT (A AND ((NOT A) OR B) AND C) OR D
= NOT ([A AND (NOT A) OR (A AND B)] AND C) OR D
= NOT ([0 OR (A AND B)] AND C) OR D
= NOT (A AND B AND C) OR D

So the circuit was two AND gates for a, b and c hooked up to a NOT gate - then all of that OR'ed with D.
Reply 2
Original post by Normangorman
Woops, I started a new thread for MEI D2 before seeing your one. Oh well.

I got the same answer as you for the simplex question yeah, though I didn't give an answer for the later parts of the question where you had to talk about waste.
A implies B = (NOT A) OR B, so I don't think you got that right.
If I can remember rightly the expression for the circuit was:
(A AND (A Implies B) AND C) Implies D
= NOT (A AND ((NOT A) OR B) AND C) OR D
= NOT ([A AND (NOT A) OR (A AND B)] AND C) OR D
= NOT ([0 OR (A AND B)] AND C) OR D
= NOT (A AND B AND C) OR D

So the circuit was two AND gates for a, b and c hooked up to a NOT gate - then all of that OR'ed with D.


NOT (A AND NOT B)=NOT A OR NOT NOT B because of De Morgan's Laws and that simplifies to NOT A OR B

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