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    Can anyone explain what the [b="switch on"] bit is used for? We weren't taught UML diagrams at all so I've had to self teach, and can't recall ever looking at loops on communication diagrams. The question wanted you to change it from an object diagram to a communication diagram by adding those labels and arrows. Thanks

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    (Original post by ryanroks1)
    Can anyone explain what the [b="switch on"] bit is used for? We weren't taught UML diagrams at all so I've had to self teach, and can't recall every looking at loops on communication diagrams. The question wanted you to change it from an object diagram to a communication diagram by adding those labels and arrows. Thanks

    no clue, saw my teacher do that question and miss it out...
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    (Original post by ryanroks1)
    Can anyone explain what the [b="switch on"] bit is used for? We weren't taught UML diagrams at all so I've had to self teach, and can't recall ever looking at loops on communication diagrams. The question wanted you to change it from an object diagram to a communication diagram by adding those labels and arrows. Thanks

    Haven't seen that before myself, but I would assume it's a shorthand IF statement. The Keypad gets b as the ButtonPress, processes it and then [(IF) b="switch on"], the switchOn() method is executed and the door is unlocked.
    If the code is incorrect, the switchOn() method won't run and the door will not unlock.
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    (Original post by Jamuk)
    Haven't seen that before myself, but I would assume it's a shorthand IF statement. The Keypad gets b as the ButtonPress, processes it and then [(IF) b="switch on"], the switchOn() method is executed and the door is unlocked.
    If the code is incorrect, the switchOn() method won't run and the door will not unlock.
    Makes more sense now, thank you! I'm guessing they would have probably accepted any reasonable notation since it's not something you're going to know to include.
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    (Original post by ryanroks1)
    Makes more sense now, thank you! I'm guessing they would have probably accepted any reasonable notation since it's not something you're going to know to include.
    Yeah I probably wouldn't have thought to write that!
    My Physics teacher keeps saying that the mark schemes released by exam boards are preliminary ones they create at the time the paper is made, and then more detailed schemes are created and modified before/during the marking process as they realise what the students write.
    Might explain some of the stupidly vague/specific mark points (or dotties as they call them) from OCR...
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    (Original post by Jamuk)
    Yeah I probably wouldn't have thought to write that!
    My Physics teacher keeps saying that the mark schemes released by exam boards are preliminary ones they create at the time the paper is made, and then more detailed schemes are created and modified before/during the marking process as they realise what the students write.
    Might explain some of the stupidly vague/specific mark points (or dotties as they call them) from OCR...
    "Max 2 per dotty" - never gets old
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    (Original post by Dapperblook22)
    This type of queue is a circular queue. It is different to an ordinary queue as circular queues are fixed size so they are easier to program than ordinary queues which are dynamic.

    When adding the first item, the Next pointer is incremented, and so moves to the front of the queue (as this is a circular queue - think of it as a circle). The second item is then inserted, and Next incremented again one place to the right. However, you must check whether the queue is full before adding the next item. Circular queues are "full" if they have one empty space.

    The wikipedia page has a good description of them:
    https://en.wikipedia.org/wiki/Circular_buffer

    Sorry I am unable to upload a diagram at the moment.
    How did you know it was a circular queue and not a normal queue?
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    (Original post by nikeshjobanputra)
    How did you know it was a circular queue and not a normal queue?
    It mentions in the question "the queue can be represented by a fixed size data structure". Circular queues are fixed size, normal queues are dynamic.
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    Here are my notes, hope they are useful

    http://s000.tinyupload.com/index.php...13343115214666
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    Any idea as to what questions we'll be getting? Any last-minute revision tips either?
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    (Original post by TheEternalOne)
    Any idea as to what questions we'll be getting? Any last-minute revision tips either?
    Probably modes of addressing and BNF, as those did not come up last year. Declarative languages I think is likely to be one of the questions too, as last year it was OO and procedural iirc. Binary conversions are guarenteed to come up.
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    (Original post by ryanroks1)
    Can anyone explain what the [b="switch on"] bit is used for? We weren't taught UML diagrams at all so I've had to self teach, and can't recall ever looking at loops on communication diagrams. The question wanted you to change it from an object diagram to a communication diagram by adding those labels and arrows. Thanks

    I believe this is called a "Conditional Message", this can also be used for iteration but it's not at all on the spec so this is as complicated as it gets. The message is only sent if the clause is TRUE.

    All in all, going over the spec I assume things like scheduling, paging + segmentation, advantages of HLL over machine code, Fetch/Decode/Execute cycle, RISC + CISC, floating point, dynamic data structures, binary and serial searches + advantages over one another, quick sort, declarative, procedural, variable scope, addressing modes, UML maybe class + object, flat file v relational db and maybe some DML/DDL will appear tomorrow.

    That above is a run down list of what I assume will appear on the exam more or less, but I'm revising everything as you always should.
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    Only thing I'm worried about is RISC/CISC cycle's coming up (because they seem to switch between clock cycles and FDE cycles without even telling you which one to write about) and also function/procedure definition, because they seem to change their mind about which one does what. xD
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    (Original post by CervixPounder)
    Only thing I'm worried about is RISC/CISC cycle's coming up (because they seem to switch between clock cycles and FDE cycles without even telling you which one to write about) and also function/procedure definition, because they seem to change their mind about which one does what. xD
    As a user mentioned earlier, i think they chose the definition that is most popular among candidates that year.
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    Is a machine cycle the same as an FDE cycle?
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    (Original post by Aydin7)
    As a user mentioned earlier, i think they chose the definition that is most popular among candidates that year.
    That does not seem fair at all LOL
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    I attached last year's paper if anyone needs them (you seem to need a login to access them on the OCR website)
    Attached Images
  1. File Type: pdf F453_15Jun_qp.pdf (449.4 KB, 47 views)
  2. File Type: pdf F453_15jun_ms.pdf (229.8 KB, 51 views)
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    (Original post by WhatIsSleep)
    Is a machine cycle the same as an FDE cycle?
    I made a thread concerning this a few weeks ago, I don't know how accurate the information I got was.

    I've come across two different questions asking for the differences between RISC and CISC. One of the markschemes said that RISC takes more cycles, and one said that CISC takes more cycles.

    I think the main thing to remember is to distinguish between TASK and INSTRUCTION.

    eg. A task may take more FDE cycles for a RISC processor, as it must perform more instrutions to replicated the complexity of a CISC instruction.

    But, an instruction may take more clock cycles for a CISC processor, as there are more stages to the instruction. But, a RISC instruction only takes 1 clock cycle.

    Here's the link to the thread, hopefully they just don't ask about it: http://www.thestudentroom.co.uk/show...147&highlight=
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    (Original post by CervixPounder)
    I made a thread concerning this a few weeks ago, I don't know how accurate the information I got was.

    I've come across two different questions asking for the differences between RISC and CISC. One of the markschemes said that RISC takes more cycles, and one said that CISC takes more cycles.

    I think the main thing to remember is to distinguish between TASK and INSTRUCTION.

    eg. A task may take more FDE cycles for a RISC processor, as it must perform more instrutions to replicated the complexity of a CISC instruction.

    But, an instruction may take more clock cycles for a CISC processor, as there are more stages to the instruction. But, a RISC instruction only takes 1 clock cycle.

    Here's the link to the thread, hopefully they just don't ask about it: http://www.thestudentroom.co.uk/show...147&highlight=
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    Nice username haha
    I hope they don't, but it's OCR.

    So a RISC instruction only takes one clock cycle but will need more FDE cycles to carry out the equivalent of a CISC instruction? And a CISC instruction only takes one FDE cycle but many clock cycles?

    If they ask, I guess I'd specify what kind of cycle in my answer.
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    (Original post by WhatIsSleep)
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    Nice username haha
    I hope they don't, but it's OCR.

    So a RISC instruction only takes one clock cycle but will need more FDE cycles to carry out the equivalent of a CISC instruction? And a CISC instruction only takes one FDE cycle but many clock cycles?

    If they ask, I guess I'd specify what kind of cycle in my answer.
    From what I understand, yes, what you typed is correct. But OCR themselves don't offer any enlightenment on it I don't think.
 
 
 
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