jakelpbooth
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  1. My teacher did a really poor job of explaining the CPU registers, I have a vague idea of what they are and do but not how they link in with the fetch execute cycle.
    To my understanding the CPU fetches an instruction from the memory, the CPU decodes it then executes it. For a 4th event can I say the ALU then decides what operation to apply to the instruction? Or that the address is stored in the MAR until it's been executed. I'm studying at GCSE level and any help is appreciated. Thanks
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Tahmina3110
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Yeah that's basically the cycle. I'm not quite sure about the MAR and the MDR being included in the cycle but first of all, both the data and the program that acts upon that data are loaded into main memory (RAM) by the operating system. The CPU then fetches an instruction from the memory and decodes it into simpler terms to make it easier to carry out. After that, after simplifying the instruction and making it easier to work out, the CPU executes the instruction. How fast the execution is I'm pretty sure depends on the factors that affect the performance of the CPU, like the cache size, the clock speed and the number of cores. Hope this helped you understand the cycle a bit more.
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mzmingle
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Looking at my notes, this is what I have. I did this a while ago, so I'm not sure how well I could explain it to you if you needed extra help but I can try haha.

MAR ← [PC] (contents of the Program Counter copied to the Memory Address Register)

MDR ← [Memory] addressed (contents of addressed memory is copied to the memory data register/memory buffer register)

PC ← [PC] + 1 (incrementing the PC by 1.)

CIR ← [MDR] (if contents of MDR is an instruction, it is copied to the Current Instruction Register)

[CIR] decoded and executed
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