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Capacitor Question (PHYS)

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🔴My QUES.:

1) how does a capacitor in this circuit help in timing a circuit here? the current isn't flowing to the capaciotr as S2 switch is open.

2) why are we calculating time it takes for the integrated circuit at Y to come to 8V by calculating time constant by RC?
isn't time constant used for capacitors only, to calculate time it takes for the charge of the capacitor to come down to 37% of its original charge?

3) what value of R and C should we use for calculating the time? if i use capacitor's C and Resistor's R, i get t= 4.05×10^(-3) s
(edited 11 months ago)
Reply 1
The capacitor is initially discharged and then s1 is closed allowing the capacitor to charge through the 2 resistors in series... S2 is open so it's not going to have any effect.


Id assume the IC operates as voltage controlled switch for some other equipment and Y Is the controlling voltage.
Original post by Joinedup
The capacitor is initially discharged and then s1 is closed allowing the capacitor to charge through the 2 resistors in series... S2 is open so it's not going to have any effect.


Id assume the IC operates as voltage controlled switch for some other equipment and Y Is the controlling voltage.

you mentioned about "allowing capacitor to charge through the 2 resistors",
BUT if S2 is open, then how is the capacitor going to get charged? because S2 being open makes it an incomplete circuit for the current to flow.
shouldn't the current just pass through the two resistors and then just go directly to the Y integrated circuit? if that's the case, then capacitor will not be chargining at all (uncharged like how it was initially).
Reply 3
Original post by Aleksander Krol
you mentioned about "allowing capacitor to charge through the 2 resistors",
BUT if S2 is open, then how is the capacitor going to get charged? because S2 being open makes it an incomplete circuit for the current to flow.
shouldn't the current just pass through the two resistors and then just go directly to the Y integrated circuit? if that's the case, then capacitor will not be chargining at all (uncharged like how it was initially).


There is an assumption for this circuit not shown explicitly:

The capacitor C and S1 are both connected to a common node of 0V, implying the charging voltage (8.0V) is derived from a voltage source with it's -ve terminal also connected elsewhere in the schematic to the same 0V potential. Thus the circuit is completed.

In other words the circuit is similar to this where Vs is 8.0V, the switch represents S1, R is the summed resistance of (R1 + R2) and Vc represents the potential across the capacitor at Y:

(edited 11 months ago)

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