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A Level physics electricity question

Hi, I was wondering if someone could give me some help. According to the markscheme, the voltage across resistor R in circuit B cannot have a voltage of less than about 5V, however in circuit D it can. I was wondering why this is the case:

The circuits are on page 10 (https://filestore.aqa.org.uk/sample-papers-and-mark-schemes/2019/june/AQA-74072-QP-JUN19.PDF) and the other information which is relevant is that: 'The maximum resistance of resistor P is twice the resistance of R.
The battery has an emf of 14.6 V and negligible internal resistance'

I think that the current through resistor R cannot be 0A in circuit B but can be 0A in circuit D because the slider can be pushed to the far right and then current will flow in the path without the resistor, thus no current will flow through the resistor in circuit D but I'm not sure if this logic is correct/relevant to the question.

Any help is much appreciated!
Original post by Felix'sfreckles
Hi, I was wondering if someone could give me some help. According to the markscheme, the voltage across resistor R in circuit B cannot have a voltage of less than about 5V, however in circuit D it can. I was wondering why this is the case:

The circuits are on page 10 (https://filestore.aqa.org.uk/sample-papers-and-mark-schemes/2019/june/AQA-74072-QP-JUN19.PDF) and the other information which is relevant is that: 'The maximum resistance of resistor P is twice the resistance of R.
The battery has an emf of 14.6 V and negligible internal resistance'

I think that the current through resistor R cannot be 0A in circuit B but can be 0A in circuit D because the slider can be pushed to the far right and then current will flow in the path without the resistor, thus no current will flow through the resistor in circuit D but I'm not sure if this logic is correct/relevant to the question.

Any help is much appreciated!


These have got to be some of the most ridiculous circuit diagrams ever...

In circuit B: Resistor R and variable resistor P (Assuming that is what it is) are connected in series. Therefore, there will always be a potential drop across resistor R. We can see though that Figure 3 has a measured data point showing (0,0). This cannot be the circuit that created the figure then (and also explains why R cannot have a voltage less than some lower limit).

In circuit D: Resistor R and variable resistor P are connected in parallel (you can tell as there is a loop that only requires going through P and not P and R). In this case, you can reduce the variable resistor's resistance such that it becomes the path of least resistance and no current flows through resistor R. So you are partially correct in your understanding: the extra context is just further one circuit is series and the other is parallel.
Original post by Joseph McMahon
These have got to be some of the most ridiculous circuit diagrams ever...

In circuit B: Resistor R and variable resistor P (Assuming that is what it is) are connected in series. Therefore, there will always be a potential drop across resistor R. We can see though that Figure 3 has a measured data point showing (0,0). This cannot be the circuit that created the figure then (and also explains why R cannot have a voltage less than some lower limit).

In circuit D: Resistor R and variable resistor P are connected in parallel (you can tell as there is a loop that only requires going through P and not P and R). In this case, you can reduce the variable resistor's resistance such that it becomes the path of least resistance and no current flows through resistor R. So you are partially correct in your understanding: the extra context is just further one circuit is series and the other is parallel.

That makes a lot of sense! Thank you very much!

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